{
  "paper_doi": "10.48550/arXiv.2509.18480",
  "paper_title": "Phase 1 technical rehearsal for Apple Silicon viability benchmark",
  "paper_year": 2026,
  "headline_metric": {
    "name": "engineering_rehearsal_median_lddt",
    "value": 0.5,
    "tolerance_pct": 100,
    "units": "lDDT"
  },
  "data_sources": [
    "pilot/data/test_set_v1_candidates.csv",
    "RCSB PDB reference structures"
  ],
  "models": [
    {
      "name": "simplefold-100m",
      "code_url": "https://github.com/apple/ml-simplefold",
      "apple_silicon_path": "native_mlx"
    }
  ],
  "evaluation_set": [
    "9PFE:A",
    "13CZ:A",
    "13BB:A"
  ],
  "evaluation_metric": "lDDT",
  "quotes": [
    {
      "field": "fixture_scope",
      "text": "ENGINEERING_REHEARSAL_NOT_PAPER_CLAIM: this recipe exercises the Phase 1 target path on one short, one mid, and one long candidate chain. It is not the final benchmark and must not be reported as a Phase 1 result."
    },
    {
      "field": "target_source",
      "text": "Targets are selected from pilot/data/test_set_v1_candidates.csv generated from RCSB Search and Data APIs on 2026-05-13."
    }
  ]
}